Google expanded its eighth generation Tensor Processing Unit family on November 9, adding TPU 8tx for secure and confidential inference and TPU 8i Max for massive context windows. A Tensor Processing Unit, or TPU, is a chip Google designs itself for AI work. The two new systems make four TPU systems introduced in a single year, which Google says is a first.
Neither system is a brand new chip. Google built both from silicon it introduced in April at Google Cloud Next, TPU 8t for training at large scale and TPU 8i for reasoning in real time. The news here is how Google repackages that silicon around two problems customers keep naming: keeping sensitive data protected while a model uses it, and feeding a model far more context without stalling.
The Announcement
TPU 8tx is the security play. Data is normally encrypted when stored and when sent across a network, but it has to be unlocked in memory while a computer works on it. Google says TPU 8tx builds protection into the hardware layer, keeping sensitive data and model weights protected and isolated even while in active use.
The system uses the same silicon as TPU 8t and pairs it with fifth generation AMD EPYC CPU hosts. AMD said on November 9 that its Secure Encrypted Virtualization technology helps extend that protection from the host CPU to connected accelerators, and called TPU 8tx the first cloud TPU system with hardware enforced confidential computing. That first claim comes from AMD and Google, not from an outside audit published with the launch.
Google also says TPU 8tx adopts the Boardfly network it built for TPU 8i, delivering up to twice lower latency than TPU 8t with a near zero performance penalty. Read that as a company claim. No independent test of either new system appeared in the launch coverage, and Google published no benchmark table that a buyer could check on their own workload.
TPU 8i Max is the memory play. A context window is the amount of material a model can hold in mind during one request, such as a whole codebase or hours of video. Google took two TPU 8i chips and combined them onto a single package. It says the result doubles compute, doubles SRAM, and doubles high bandwidth memory bandwidth compared with TPU 8i, and fits twice the silicon inside the same rack footprint.
Important Details
| System | Job | Basis |
|---|---|---|
| TPU 8t | Training at large scale | Introduced April 2026 |
| TPU 8i | Reasoning in real time | Introduced April 2026 |
| TPU 8tx | Confidential inference, smaller scale training | TPU 8t silicon, fifth generation AMD EPYC hosts, Boardfly network |
| TPU 8i Max | Massive context windows, highest compute density per rack | Two TPU 8i chips in one package |
Google put the family numbers from April in the same post. It says TPU 8t offers up to 2.7 times better training performance than the prior generation, and TPU 8i offers 80 percent better inference price performance. Both figures are Google comparisons against its own prior generation, stated in its own announcement.
The launch also carried software news around the chips. Google said TorchTPU, open sourced last month, lets PyTorch code and Hugging Face models run on TPUs without code rewrites. It said TPU Sync, now open sourced, tiers large key value caches off the chip and claims cuts of more than 90 percent in cache transfer latency and time to first token in its own description. Cloud Pathways and dynamic slicing on Google Kubernetes Engine were described as generally available. Those software claims matter, because a chip a team cannot program easily is a chip it will not buy.
Google says TPUs now serve nearly 100 customers, including frontier labs, trading firms, retailers and universities. It named none of them in this announcement. We have followed Google building stranger parts of this same stack before, in Google Suncatcher, and the pattern holds: the ambition is real, the customer proof is thinner than the hardware detail.
What’s Next
Confirmed facts stop early, and readers should notice where. Google’s November 9 announcement lists no price and no specific release date for either system. Reporting from Bloomberg, cited in trade coverage of the launch, said both systems will be available next year. Google itself did not put that date in its own post, so treat next year as reported, not announced.
Open questions are the ones a buyer would ask first. What will each system cost per hour, in which regions will it run, and what proof will a regulated customer get that the confidential mode works as described? AMD describes hardware checks of accelerator identity and security setup, but neither company published a full design that a security team could review at launch.
The takeaway is narrower than the headline count of four systems in one year. Google is no longer selling one TPU shape and asking every workload to fit it. It is splitting the line by job: train, reason, protect, and remember. Whether that split wins customers away from Nvidia will depend on the two numbers Google did not give on Monday, price and a date.
Facts checked November 10, 2026, against the Google and AMD announcements dated November 9, 2026.
Sources
- Google, Introducing TPU 8tx and TPU 8i Max, November 9, 2026: https://blog.google/innovation-and-ai/infrastructure-and-cloud/global-network/tpu-8i-max-and-8tx/
- AMD Newsroom, AMD EPYC Expands Its Leadership at the Foundation of AI, November 9, 2026: https://newsroom.amd.com/news/amd-epyc-expands-leadership-foundation-ai/
- SiliconANGLE, Google advances agentic AI custom silicon expanding TPU family with 8tx and 8i Max, November 9, 2026: https://siliconangle.com/2026/11/09/google-advances-agentic-ai-custom-silicon-expanding-tpu-family-with-8tx-and-8i-max/
- Family image: Google
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